LEON3 has passed SPARC Architecture Version 8 compliance testing on May 1, 2005 and has been declared SPARC V8 Compliant.
The LEON3 is the more performant successor of the LEON2 processor capable of delivering 400 MIPS on a 0.13 um process. The successful compliance testing is yet another milestone in our continuous development of SPARC processors, says Jiri Gaisler, CTO and founder of Gaisler Research.
The SPARC (Scalable Processor ARChitecture) is the industry’s only openly defined and evolved RISC architecture. Unlike other RISC (Reduced Instruction Set Computer) designs, SPARC specifies not a hardware implementation (“chip”), but an open, standard architecture belonging to the community of SPARC vendors and users. The SPARC specification is defined by the SPARC Architecture Committee, a technical arm of the computer-maker consortium, SPARC International.
About Gaisler Research AB
Gaisler Research AB is a provider of SoC solutions for exceptionally competitive markets such as Aerospace, Military and demanding Commercial applications. The Gaisler Research’s products consist of user-customizable 32-bit SPARC V8 processor cores, peripheral IP-cores and associated software and development tools. Gaisler Research solutions help companies develop highly competitive customer and application-specific SoC designs.